Part Number Hot Search : 
M1G5CA 51098 2C120 R5F21 R0402 SZN4987 LTC1040 DTA113
Product Description
Full Text Search
 

To Download VP2450N3-G Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com vp2450 p-channel enhancement-mode vertical dmos fet absolute maximum ratings parameter value drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55 o c to +150 o c soldering temperature* 300 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. * distance of 1.6mm from case for 10 seconds. ordering information device package options bv dss /bv dgs (v) r ds(on) (max) () i d(on) (min) (ma) to-92 to-243aa (sot-89) vp2450 VP2450N3-G vp2450n8-g -500 30 -200 -g indicates package is rohs compliant (green) pin con?gurations to-92 (n3) product marking to-243aa (sot-89) (n8) vp4ew w = code for week sealed = green packagin g features free from secondary breakdown low power drive requirement ease of paralleling low c iss and fast switching speeds high input impedance and high gain excellent thermal stability integral source-to-drain diode applications motor controls converters ampli?ers switches power supply circuits drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) ? ? ? ? ? ? ? ? ? ? ? ? ? general description the supertex vp2450 is an enhancement-mode (normally- off) transistor that utilizes a vertical dmos structure and supertexs well-proven silicon-gate manufacturing process. this combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coef?cient inherent in mos devices. characteristic of all mos structures, this device is free from thermal runaway and thermally-induced secondary breakdown. supertexs vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. ga te source drain to-243aa (sot-89) (n8) ga te source drain drain to-92 (n3) yy = year sealed ww = week sealed = green packaging s i v p 2 4 5 0 y y w w package may or may not include the following marks: si or packages may or may not include the following marks: si or
2 vp2450 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com electrical characteristics (t a = 25 o c unless otherwise speci?ed) sym parameter min typ max units conditions bv dss drain-to-source breakdown voltage -500 - - v v gs = 0v, i d = -250a v gs(th) gate threshold voltage -1.5 - -3.5 v v gs = v ds , i d = -1.0ma v gs(th) change in v gs(th) with temperature - - -4.8 mv/ o c v gs = v ds , i d = -1.0ma i gss gate body leakage - - -100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current - - -10 a v gs = 0v, v ds = max rating - - -1.0 ma v ds = 0.8 max rating, v gs = 0v, t a = 125c i d(on) on-state drain current -75 - - ma v gs = -4.5v, v ds = -15v -200 - - v gs = -10v, v ds = -15v r ds(on) static drain-to-source on-state resistance - - 35 v gs = -4.5v, i d = -50ma - - 30 v gs = -10v, i d = -100ma r ds(on) change in r ds(on) with temperature - - 0.75 %/ o c v gs = -10v, i d = -100ma g fs forward transductance 150 320 - mmho v ds = -15v, i d = -100ma c iss input capacitance - - 190 pf v gs = 0v, v ds = -25v, f = 1.0mhz c oss common source output capacitance - - 75 c rss reverse transfer capacitance - - 20 t d(on) turn-on delay time - - 10 ns v dd = -25v, i d = -200ma, r gen = 25 t r rise time - - 25 t d(off) turn-off delay time - - 45 t f fall time - - 25 v sd diode forward voltage drop - - -1.8 v v gs = 0v, i sd = -100ma t rr reverse recovery time - 300 - ns v gs = 0v, i sd = -100ma notes: all d.c. parameters 100% tested at 25 o c unless otherwise stated. (pulse test: 300s pulse, 2% duty cycle.) all a.c. parameters sample tested. 1. 2. thermal characteristics package i d (continuous) ? (ma) i d (pulsed) (ma) power dissipation @t c = 25 o c (w) jc ( o c/w) ja ( o c/w) i dr ? (ma) i drm (ma) to-92 -100 -300 1.0 125 170 -100 -300 to-243aa (sot-89) -160 -800 1.6 ? 15 78 -160 -800 switching waveforms and test circuit 90% 10% 90% 90% 10% 10% puls e genera to r v dd r l outpu t d.u.t . t (on) t d(on) t (off ) t d(off) t f t r inpu t input output 0v v dd r gen 0v -10v ? i d (continuous) is limited by max rated t j . ? mounted on fr5 board, 25mm x 25mm x 1.57mm.
3 vp2450 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com typical performance curves power dissipation vs case te mperatur e t c
4 vp2450 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com typical performance curves (cont.)
5 vp2450 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com 3-lead to-92 package outline (n3) symbol a b c d e e1 e e1 l dimensions (inches) min .170 .014 ? .014 ? .175 .125 .080 .095 .045 .500 nom - - - - - - - - - max .210 .022 ? .022 ? .205 .165 .105 .105 .055 .610* jedec registration to-92. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. ? this dimension is a non-jedec dimension. drawings not to scale. supertex doc.#: dspd-3to92n3, version d080408. seating plane 1 2 3 front v iew side v iew bottom v iew e1 e d e1 l e c 1 2 3 b a
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2008 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 9408 9 te l: 408-222-8888 www .supertex.com 6 vp2450 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the latest package outline information go to http://www.supertex.com/packaging.htm l .) doc.# dsfp-vp2450 a012009 3-lead to-243aa (sot-89) package outline (n8) symbol a b b1 c d d1 e e1 e e1 h l dimensions (mm) min 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.13 1.50 bsc 3.00 bsc 3.94 0.89 nom - - - - - - - - - - max 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20 jedec registration to-243, variation aa, issue c, july 1986. drawings not to scale . supertex doc. #: dspd-3to243aan8, version d070908. b b1


▲Up To Search▲   

 
Price & Availability of VP2450N3-G

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X